cbmem tool fails with SIGBUS error on Kevin64 |
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Issue description
Chrome Version: 72.0.3606.0
OS: ChromeOS
What steps will reproduce the problem?
(1) Boot Kevin64 image
(2) Run cbmem in developer console
cbmem does not work on arm64, it crashed with 'Program received signal SIGBUS, Bus error'. So it is not possible to grab bios time information.
I enabled aarch64 to get data from device tree in cbmem.c, similarly to arm. I enclosed cbmem verbose output. The tool is able to find timestamp table label, but after that it cannot reach the cbmem address in parse_cbmem_ref function.
(gdb) run
Starting program: /tmp/cbmem
Looking for coreboot table at f7ed9000 788 bytes.
Mapping 788B of physical memory at 0xf7ed9000 (requested 0xf7ed9000).
Mapping 788B of physical memory at 0xf7ed9000 (requested 0xf7ed9018).
... padding virtual address with 0x18 bytes.
Found!
coreboot table entry 0x01
Found memory map.
LB_MEM_TABLE found.
coreboot table entry 0x03
coreboot table entry 0x04
coreboot table entry 0x05
coreboot table entry 0x06
coreboot table entry 0x07
coreboot table entry 0x26
coreboot table entry 0x12
coreboot table entry 0x13
coreboot table entry 0x20
coreboot table entry 0x25
coreboot table entry 0x28
coreboot table entry 0x29
coreboot table entry 0x16
Found timestamp table.
Program received signal SIGBUS, Bus error.
0x0000005555556b50 in parse_cbmem_ref (cbmem_ref=0x7fb7ff71fc) at cbmem.c:282
Does anybody has any idea?
,
Nov 26
https://review.coreboot.org/cgit/coreboot.git/tree/util/cbmem/cbmem.c#n326 case LB_TAG_TIMESTAMPS: { debug(" Found timestamp table.\n"); timestamps = parse_cbmem_ref((struct lb_cbmem_ref *)lbr_p); continue; } Best I can surmise is that it's an alignment error doing 'ret = *cbmem_ref;' when it should probably be a memcpy. It'd be best to decode the error code to see what it's saying. struct lb_record { uint32_t tag; /* tag ID */ uint32_t size; /* size of record (in bytes) */ }; struct lb_cbmem_ref { u32 tag; u32 size; u64 cbmem_addr; }; If the generated code assumes lb_cbmem_ref is always at least 8-byte aligned it could be generating an alignment error because cbmem_addr would reside at address 0x7fb7ff7204 which is not 8 byte aligned.
,
Nov 27
Yeah, I think Aaron is right. We've already had this problem in other places and have introduced the aligned_memcpy() function to work around that (since a normal memcpy() isn't guaranteed to not make unaligned accesses either). This should help: https://review.coreboot.org/c/coreboot/+/29848
,
Nov 27
Thanks for your comments. I've checked this fix, and it works.
,
Dec 5
,
Dec 5
CL was landed so I assume this is fixed now?
,
Dec 6
Yes, it could be closed, I mark as 'verified'. |
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Comment 1 by dtapu...@chromium.org
, Nov 23