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Issue 857213 link

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Issue metadata

Status: Untriaged
Owner: ----
Cc:
Components:
EstimatedDays: ----
NextAction: ----
OS: Chrome
Pri: 2
Type: Feature



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Ignore EC SPI flash protect state when disabling USB-PD in RO

Project Member Reported by dnojiri@chromium.org, Jun 27 2018

Issue description

Currently, SPI flash has to be write protected for USB PD to be disabled while EC is in RO. This makes what dogfooders see greatly different from what normal users will see.

We should not consider SPI flash protect state when enabling/disabling USB PD at start-up in EC-RO.
 
This was a trade-off for developers running with soft-sync disabled.

Comment 2 Deleted

We're thinking about introducing a new flag in EC-RO:

  0: PD is disabled regardless of SPI WP state (proposed behavior)
  1: PD is enabled if SPI WP is off (current behavior)

This flag should be ideally located somewhere addressed by fmap so that it can be changed without recompilation (just like GBB flags).

For those who need to disable soft-sync (for whatever reasons), we can offer a tool setting the flag to 1.

Alternatively, the flag can be:

  0: PD is disabled in RO
  1: PD is enabled in RO

This scheme is simpler but we have to make sure we won't ship devices with the flag set (while in the 1st scheme, it doesn't matter because PD is disabled as long as SPI WP is on).
Factory finalize should use a host command to read the flag(s) to ensure they're in the proper state.  Similar to how it checks AP's GBB flags.

One example of confusion: https://issuetracker.google.com/80052680.
Cc: kmshelton@chromium.org

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