The following revision refers to this bug:
  https://chromium.googlesource.com/chromiumos/third_party/kernel/+/12a73c7716a94053da5245213d16efaa81990aeb

commit 12a73c7716a94053da5245213d16efaa81990aeb
Author: Imre Deak <imre.deak@intel.com>
Date: Fri May 11 09:58:48 2018

UPSTREAM: drm/i915: Avoid PPS HW/SW state mismatch due to rounding

We store a SW state of the t11_t12 timing in 100usec units but have to
program it in 100msec as required by HW. The rounding used during
programming means there will be a mismatch between the SW and HW states
of this value triggering a "PPS state mismatch" error. Avoid this by
storing the already rounded-up value in the SW state.

Note that we still calculate panel_power_cycle_delay with the finer
100usec granularity to avoid any needless waits using that version of
the delay.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103903
Cc: joks <joks@linux.pl>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjl <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171129175137.2889-1-imre.deak@intel.com

BUG= chromium:841942 
TEST=Boot Baytrail Chromebooks with chromeos-4.14

Change-Id: Ia0da358d71ef2847bbc92244423fabbe444efe15
Signed-off-by: Guenter Roeck <groeck@chromium.org>
(cherry picked from commit 5643205c6340b565a3be0fe0e7305dc4aa551c74)
Reviewed-on: https://chromium-review.googlesource.com/1054493
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>

[modify] https://crrev.com/12a73c7716a94053da5245213d16efaa81990aeb/drivers/gpu/drm/i915/intel_dp.c

No longer relevant