New issue
Advanced search Search tips

Issue 764358 link

Starred by 1 user

Issue metadata

Status: Fixed
Owner:
Closed: Sep 2017
Cc:
Components:
EstimatedDays: ----
NextAction: ----
OS: Android
Pri: 3
Type: Bug



Sign in to add a comment

ClangToTAndroid fails during isel with "Overran sorted position"

Project Member Reported by h...@chromium.org, Sep 12 2017

Issue description

From https://build.chromium.org/p/chromium.fyi/builders/ClangToTAndroid/builds/1356:


FAILED: obj/v8/test/cctest/cctest/test-strings.o 
../../third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/v8/test/cctest/cctest/test-strings.o.d -DV8_INTL_SUPPORT -DV8_DEPRECATION_WARNINGS -DNO_TCMALLOC -DSAFE_BROWSING_DB_REMOTE -DCHROMIUM_BUILD -DFIELDTRIAL_TESTING_ENABLED -DCR_CLANG_REVISION=\"313013\" -D_FILE_OFFSET_BITS=64 -DANDROID -DHAVE_SYS_UIO_H -DANDROID_NDK_VERSION_ROLL=r12b_1 -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D_FORTIFY_SOURCE=2 -D__GNU_SOURCE=1 -D__compiler_offsetof=__builtin_offsetof -Dnan=__builtin_nan -DNDEBUG -DNVALGRIND -DDYNAMIC_ANNOTATIONS_ENABLED=0 -DV8_INTL_SUPPORT -DENABLE_HANDLE_ZAPPING -DV8_USE_SNAPSHOT -DV8_USE_EXTERNAL_STARTUP_DATA -DV8_TARGET_ARCH_ARM -DCAN_USE_ARMV7_INSTRUCTIONS -DCAN_USE_VFP3_INSTRUCTIONS -DCAN_USE_VFP32DREGS -DCAN_USE_NEON -DU_USING_ICU_NAMESPACE=0 -DU_ENABLE_DYLOAD=0 -DU_STATIC_IMPLEMENTATION -DICU_UTIL_DATA_IMPL=ICU_UTIL_DATA_FILE -DUCHAR_TYPE=uint16_t -I../.. -Igen -I../../v8/include -Igen/v8/include -I../../v8 -I../../v8/include -I../../third_party/icu/source/common -I../../third_party/icu/source/i18n -ffp-contract=off -fno-strict-aliasing --param=ssp-buffer-size=4 -fstack-protector -Wno-builtin-macro-redefined -D__DATE__= -D__TIME__= -D__TIMESTAMP__= -funwind-tables -fPIC -pipe -fcolor-diagnostics -ffunction-sections -fno-short-enums --target=arm-linux-androideabi -march=armv7-a -mfloat-abi=softfp -mtune=generic-armv7-a -mfpu=neon -mthumb -Wall -Werror -Wextra -Wno-missing-field-initializers -Wno-unused-parameter -Wno-c++11-narrowing -Wno-covered-switch-default -Wno-unneeded-internal-declaration -Wno-inconsistent-missing-override -Wno-undefined-var-template -Wno-nonportable-include-path -Wno-address-of-packed-member -Wno-unused-lambda-capture -Wno-user-defined-warnings -Wno-enum-compare-switch -Wno-tautological-unsigned-zero-compare -fomit-frame-pointer -gdwarf-3 -g1 -fdebug-info-for-profiling -fvisibility=hidden -Wheader-hygiene -Wstring-conversion -Wtautological-overlap-compare -fPIE -Wsign-compare -Winconsistent-missing-override -O2 -fno-ident -fdata-sections -ffunction-sections -std=gnu++14 -fno-rtti -isystem../../third_party/android_tools/ndk/sources/cxx-stl/llvm-libc++/libcxx/include -isystem../../third_party/android_tools/ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/include -isystem../../third_party/android_tools/ndk/sources/android/support/include --sysroot=../../third_party/android_tools/ndk/platforms/android-16/arch-arm -fno-exceptions -fvisibility-inlines-hidden -c ../../v8/test/cctest/test-strings.cc -o obj/v8/test/cctest/cctest/test-strings.o
Overran sorted position:
t186: i32 = sub t42, t318
  t42: i32 = sub Constant:i32<-2>, t332:1
    t41: i32 = Constant<-2>
    t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
      t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
        t18: i32 = add t15, t17
          t15: i32 = add t13, Constant:i32<1064>
            t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
              t12: i32 = Register %vreg170
            t14: i32 = Constant<1064>
          t17: i32 = shl t10, Constant:i32<2>
            t10: i32 = and t8, Constant:i32<4095>
              t8: i32 = add t6, Constant:i32<1>
                t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t2: i32,ch = CopyFromReg t0, Register:i32 %vreg5
                  t5: i32 = undef
                t7: i32 = Constant<1>
              t9: i32 = Constant<4095>
            t16: i32 = Constant<2>
        t5: i32 = undef
      t191: i32 = Constant<18782>
      t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
        t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
          t23: i32 = Register %vreg4
        t5: i32 = undef
      t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
        t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
          t18: i32 = add t15, t17
            t15: i32 = add t13, Constant:i32<1064>
              t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                t12: i32 = Register %vreg170
              t14: i32 = Constant<1064>
            t17: i32 = shl t10, Constant:i32<2>
              t10: i32 = and t8, Constant:i32<4095>
                t8: i32 = add t6, Constant:i32<1>
                  t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t7: i32 = Constant<1>
                t9: i32 = Constant<4095>
              t16: i32 = Constant<2>
          t5: i32 = undef
        t191: i32 = Constant<18782>
        t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
          t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
            t23: i32 = Register %vreg4
          t5: i32 = undef
        t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
          t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
            t18: i32 = add t15, t17
              t15: i32 = add t13, Constant:i32<1064>
                t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t12: i32 = Register %vreg170
                t14: i32 = Constant<1064>
              t17: i32 = shl t10, Constant:i32<2>
                t10: i32 = and t8, Constant:i32<4095>
                  t8: i32 = add t6, Constant:i32<1>
                  t9: i32 = Constant<4095>
                t16: i32 = Constant<2>
            t5: i32 = undef
          t191: i32 = Constant<18782>
          t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
            t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
              t23: i32 = Register %vreg4
            t5: i32 = undef
          t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
            t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
              t18: i32 = add t15, t17
                t15: i32 = add t13, Constant:i32<1064>
                  t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t14: i32 = Constant<1064>
                t17: i32 = shl t10, Constant:i32<2>
                  t10: i32 = and t8, Constant:i32<4095>
                  t16: i32 = Constant<2>
              t5: i32 = undef
            t191: i32 = Constant<18782>
            t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
              t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                t23: i32 = Register %vreg4
              t5: i32 = undef
            t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
              t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                t18: i32 = add t15, t17
                  t15: i32 = add t13, Constant:i32<1064>
                  t17: i32 = shl t10, Constant:i32<2>
                t5: i32 = undef
              t191: i32 = Constant<18782>
              t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t23: i32 = Register %vreg4
                t5: i32 = undef
              t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t18: i32 = add t15, t17
                  t5: i32 = undef
                t191: i32 = Constant<18782>
                t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t5: i32 = undef
                t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                  t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t191: i32 = Constant<18782>
                  t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
  t318: i32 = ARMISD::CMOV Constant:i32<0>, Constant:i32<1>, Constant:i32<3>, Register:i32 %CPSR, t317
    t192: i32 = Constant<0>
    t7: i32 = Constant<1>
    t316: i32 = Constant<3>
    t315: i32 = Register %CPSR
    t317: glue = ARMISD::CMP t332:1, t333:1
      t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
        t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
          t18: i32 = add t15, t17
            t15: i32 = add t13, Constant:i32<1064>
              t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                t12: i32 = Register %vreg170
              t14: i32 = Constant<1064>
            t17: i32 = shl t10, Constant:i32<2>
              t10: i32 = and t8, Constant:i32<4095>
                t8: i32 = add t6, Constant:i32<1>
                  t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t7: i32 = Constant<1>
                t9: i32 = Constant<4095>
              t16: i32 = Constant<2>
          t5: i32 = undef
        t191: i32 = Constant<18782>
        t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
          t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
            t23: i32 = Register %vreg4
          t5: i32 = undef
        t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
          t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
            t18: i32 = add t15, t17
              t15: i32 = add t13, Constant:i32<1064>
                t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t12: i32 = Register %vreg170
                t14: i32 = Constant<1064>
              t17: i32 = shl t10, Constant:i32<2>
                t10: i32 = and t8, Constant:i32<4095>
                  t8: i32 = add t6, Constant:i32<1>
                  t9: i32 = Constant<4095>
                t16: i32 = Constant<2>
            t5: i32 = undef
          t191: i32 = Constant<18782>
          t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
            t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
              t23: i32 = Register %vreg4
            t5: i32 = undef
          t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
            t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
              t18: i32 = add t15, t17
                t15: i32 = add t13, Constant:i32<1064>
                  t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t14: i32 = Constant<1064>
                t17: i32 = shl t10, Constant:i32<2>
                  t10: i32 = and t8, Constant:i32<4095>
                  t16: i32 = Constant<2>
              t5: i32 = undef
            t191: i32 = Constant<18782>
            t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
              t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                t23: i32 = Register %vreg4
              t5: i32 = undef
            t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
              t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                t18: i32 = add t15, t17
                  t15: i32 = add t13, Constant:i32<1064>
                  t17: i32 = shl t10, Constant:i32<2>
                t5: i32 = undef
              t191: i32 = Constant<18782>
              t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t23: i32 = Register %vreg4
                t5: i32 = undef
              t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t18: i32 = add t15, t17
                  t5: i32 = undef
                t191: i32 = Constant<18782>
                t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t5: i32 = undef
                t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                  t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t191: i32 = Constant<18782>
                  t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
      t333: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, Constant:i32<0>
        t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
          t18: i32 = add t15, t17
            t15: i32 = add t13, Constant:i32<1064>
              t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                t12: i32 = Register %vreg170
              t14: i32 = Constant<1064>
            t17: i32 = shl t10, Constant:i32<2>
              t10: i32 = and t8, Constant:i32<4095>
                t8: i32 = add t6, Constant:i32<1>
                  t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t7: i32 = Constant<1>
                t9: i32 = Constant<4095>
              t16: i32 = Constant<2>
          t5: i32 = undef
        t191: i32 = Constant<18782>
        t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
          t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
            t23: i32 = Register %vreg4
          t5: i32 = undef
        t192: i32 = Constant<0>
Checking if this is due to cycles
Detected cycle in SelectionDAG
Offending node:
t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
  t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
    t18: i32 = add t15, t17
      t15: i32 = add t13, Constant:i32<1064>
        t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
          t12: i32 = Register %vreg170
        t14: i32 = Constant<1064>
      t17: i32 = shl t10, Constant:i32<2>
        t10: i32 = and t8, Constant:i32<4095>
          t8: i32 = add t6, Constant:i32<1>
            t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
              t2: i32,ch = CopyFromReg t0, Register:i32 %vreg5
                t1: i32 = Register %vreg5
              t5: i32 = undef
            t7: i32 = Constant<1>
          t9: i32 = Constant<4095>
        t16: i32 = Constant<2>
    t5: i32 = undef
  t191: i32 = Constant<18782>
  t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
    t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
      t23: i32 = Register %vreg4
    t5: i32 = undef
  t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
    t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
      t18: i32 = add t15, t17
        t15: i32 = add t13, Constant:i32<1064>
          t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
            t12: i32 = Register %vreg170
          t14: i32 = Constant<1064>
        t17: i32 = shl t10, Constant:i32<2>
          t10: i32 = and t8, Constant:i32<4095>
            t8: i32 = add t6, Constant:i32<1>
              t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                t2: i32,ch = CopyFromReg t0, Register:i32 %vreg5
                  t1: i32 = Register %vreg5
                t5: i32 = undef
              t7: i32 = Constant<1>
            t9: i32 = Constant<4095>
          t16: i32 = Constant<2>
      t5: i32 = undef
    t191: i32 = Constant<18782>
    t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
      t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
        t23: i32 = Register %vreg4
      t5: i32 = undef
    t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
      t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
        t18: i32 = add t15, t17
          t15: i32 = add t13, Constant:i32<1064>
            t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
              t12: i32 = Register %vreg170
            t14: i32 = Constant<1064>
          t17: i32 = shl t10, Constant:i32<2>
            t10: i32 = and t8, Constant:i32<4095>
              t8: i32 = add t6, Constant:i32<1>
                t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t2: i32,ch = CopyFromReg t0, Register:i32 %vreg5
                  t5: i32 = undef
                t7: i32 = Constant<1>
              t9: i32 = Constant<4095>
            t16: i32 = Constant<2>
        t5: i32 = undef
      t191: i32 = Constant<18782>
      t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
        t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
          t23: i32 = Register %vreg4
        t5: i32 = undef
      t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
        t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
          t18: i32 = add t15, t17
            t15: i32 = add t13, Constant:i32<1064>
              t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                t12: i32 = Register %vreg170
              t14: i32 = Constant<1064>
            t17: i32 = shl t10, Constant:i32<2>
              t10: i32 = and t8, Constant:i32<4095>
                t8: i32 = add t6, Constant:i32<1>
                  t6: i32,ch = load<LD4[%i.i.i11]> t0, t2, undef:i32
                  t7: i32 = Constant<1>
                t9: i32 = Constant<4095>
              t16: i32 = Constant<2>
          t5: i32 = undef
        t191: i32 = Constant<18782>
        t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
          t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
            t23: i32 = Register %vreg4
          t5: i32 = undef
        t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
          t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
            t18: i32 = add t15, t17
              t15: i32 = add t13, Constant:i32<1064>
                t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t12: i32 = Register %vreg170
                t14: i32 = Constant<1064>
              t17: i32 = shl t10, Constant:i32<2>
                t10: i32 = and t8, Constant:i32<4095>
                  t8: i32 = add t6, Constant:i32<1>
                  t9: i32 = Constant<4095>
                t16: i32 = Constant<2>
            t5: i32 = undef
          t191: i32 = Constant<18782>
          t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
            t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
              t23: i32 = Register %vreg4
            t5: i32 = undef
          t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
            t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
              t18: i32 = add t15, t17
                t15: i32 = add t13, Constant:i32<1064>
                  t13: i32,ch = CopyFromReg t0, Register:i32 %vreg170
                  t14: i32 = Constant<1064>
                t17: i32 = shl t10, Constant:i32<2>
                  t10: i32 = and t8, Constant:i32<4095>
                  t16: i32 = Constant<2>
              t5: i32 = undef
            t191: i32 = Constant<18782>
            t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
              t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                t23: i32 = Register %vreg4
              t5: i32 = undef
            t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
              t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                t18: i32 = add t15, t17
                  t15: i32 = add t13, Constant:i32<1064>
                  t17: i32 = shl t10, Constant:i32<2>
                t5: i32 = undef
              t191: i32 = Constant<18782>
              t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t23: i32 = Register %vreg4
                t5: i32 = undef
              t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t18: i32 = add t15, t17
                  t5: i32 = undef
                t191: i32 = Constant<18782>
                t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t24: i32,ch = CopyFromReg t0, Register:i32 %vreg4
                  t5: i32 = undef
                t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
                  t193: i32,ch = load<LD4[%arrayidx.i.i.i]> t11, t18, undef:i32
                  t191: i32 = Constant<18782>
                  t195: i32,ch = load<LD4[%c.i.i10]> t11, t24, undef:i32
                  t332: i32,i32 = ARMISD::UMLAL t193, Constant:i32<18782>, t195, t332
#0 0x00000000020cb02a llvm::sys::PrintStackTrace(llvm::raw_ostream&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x20cb02a)
#1 0x00000000020c912e llvm::sys::RunSignalHandlers() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x20c912e)
#2 0x00000000020c9292 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x20c9292)
#3 0x00007f01dedf6330 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x10330)
#4 0x00007f01dd9eac37 gsignal /build/eglibc-oGUzwX/eglibc-2.19/signal/../nptl/sysdeps/unix/sysv/linux/raise.c:56:0
#5 0x00007f01dd9ee028 abort /build/eglibc-oGUzwX/eglibc-2.19/stdlib/abort.c:91:0
#6 0x000000000282e477 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e477)
#7 0x000000000282e165 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e165)
#8 0x000000000282e165 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e165)
#9 0x000000000282e165 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e165)
#10 0x000000000282e165 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e165)
#11 0x000000000282e165 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x282e165)
#12 0x0000000002831df6 llvm::checkForCycles(llvm::SDNode const*, llvm::SelectionDAG const*, bool) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2831df6)
#13 0x0000000002834e97 llvm::SelectionDAG::AssignTopologicalOrder() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2834e97)
#14 0x00000000028687b1 llvm::SelectionDAGISel::DoInstructionSelection() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x28687b1)
#15 0x000000000286d635 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x286d635)
#16 0x0000000002876f9f llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2876f9f)
#17 0x0000000002878ada (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2878ada)
#18 0x0000000000f6f924 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0xf6f924)
#19 0x00000000019820c5 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x19820c5)
#20 0x0000000001c80fa3 llvm::FPPassManager::runOnFunction(llvm::Function&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x1c80fa3)
#21 0x0000000001c8104c llvm::FPPassManager::runOnModule(llvm::Module&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x1c8104c)
#22 0x0000000001c818cf llvm::legacy::PassManagerImpl::run(llvm::Module&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x1c818cf)
#23 0x0000000002252d38 (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2252d38)
#24 0x0000000002253fd2 clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions const&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::DataLayout const&, llvm::Module*, clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2253fd2)
#25 0x0000000002931bfb (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2931bfb)
#26 0x0000000002d30612 clang::ParseAST(clang::Sema&, bool, bool) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x2d30612)
#27 0x000000000293129f clang::CodeGenAction::ExecuteAction() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x293129f)
#28 0x00000000025e8a06 clang::FrontendAction::Execute() (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x25e8a06)
#29 0x00000000025c027e clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x25c027e)
#30 0x00000000026791ab clang::ExecuteCompilerInvocation(clang::CompilerInstance*) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0x26791ab)
#31 0x0000000000bbc3f8 cc1_main(llvm::ArrayRef<char const*>, char const*, void*) (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0xbbc3f8)
#32 0x0000000000b5372e main (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0xb5372e)
#33 0x00007f01dd9d5f45 __libc_start_main /build/eglibc-oGUzwX/eglibc-2.19/csu/libc-start.c:321:0
#34 0x0000000000bb7af9 _start (/b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0+0xbb7af9)
Stack dump:
0.	Program arguments: /b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/bin/clang-6.0 -cc1 -triple thumbv7--linux-android -emit-obj -disable-free -main-file-name test-strings.cc -mrelocation-model pic -pic-level 2 -pic-is-pie -mthread-model posix -relaxed-aliasing -fmath-errno -ffp-contract=off -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu generic -target-feature +soft-float-abi -target-feature -fp-only-sp -target-feature -d16 -target-feature +vfp3 -target-feature -fp16 -target-feature -vfp4 -target-feature -fp-armv8 -target-feature +neon -target-feature -crypto -target-abi aapcs-linux -mfloat-abi soft -fallow-half-arguments-and-returns -fdebug-info-for-profiling -dwarf-column-info -debug-info-kind=line-tables-only -dwarf-version=3 -debugger-tuning=gdb -ffunction-sections -fdata-sections -coverage-notes-file /b/c/builder/ClangToTAndroid/src/out/Release/obj/v8/test/cctest/cctest/test-strings.gcno -resource-dir /b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/lib/clang/6.0.0 -dependency-file obj/v8/test/cctest/cctest/test-strings.o.d -MT obj/v8/test/cctest/cctest/test-strings.o -isystem ../../third_party/android_tools/ndk/sources/cxx-stl/llvm-libc++/libcxx/include -isystem ../../third_party/android_tools/ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/include -isystem ../../third_party/android_tools/ndk/sources/android/support/include -D V8_INTL_SUPPORT -D V8_DEPRECATION_WARNINGS -D NO_TCMALLOC -D SAFE_BROWSING_DB_REMOTE -D CHROMIUM_BUILD -D FIELDTRIAL_TESTING_ENABLED -D CR_CLANG_REVISION="313013" -D _FILE_OFFSET_BITS=64 -D ANDROID -D HAVE_SYS_UIO_H -D ANDROID_NDK_VERSION_ROLL=r12b_1 -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D _FORTIFY_SOURCE=2 -D __GNU_SOURCE=1 -D __compiler_offsetof=__builtin_offsetof -D nan=__builtin_nan -D NDEBUG -D NVALGRIND -D DYNAMIC_ANNOTATIONS_ENABLED=0 -D V8_INTL_SUPPORT -D ENABLE_HANDLE_ZAPPING -D V8_USE_SNAPSHOT -D V8_USE_EXTERNAL_STARTUP_DATA -D V8_TARGET_ARCH_ARM -D CAN_USE_ARMV7_INSTRUCTIONS -D CAN_USE_VFP3_INSTRUCTIONS -D CAN_USE_VFP32DREGS -D CAN_USE_NEON -D U_USING_ICU_NAMESPACE=0 -D U_ENABLE_DYLOAD=0 -D U_STATIC_IMPLEMENTATION -D ICU_UTIL_DATA_IMPL=ICU_UTIL_DATA_FILE -D UCHAR_TYPE=uint16_t -I ../.. -I gen -I ../../v8/include -I gen/v8/include -I ../../v8 -I ../../v8/include -I ../../third_party/icu/source/common -I ../../third_party/icu/source/i18n -D __DATE__= -D __TIME__= -D __TIMESTAMP__= -isysroot ../../third_party/android_tools/ndk/platforms/android-16/arch-arm -internal-isystem ../../third_party/android_tools/ndk/platforms/android-16/arch-arm/usr/local/include -internal-isystem /b/c/builder/ClangToTAndroid/src/third_party/llvm-build/Release+Asserts/lib/clang/6.0.0/include -internal-externc-isystem ../../third_party/android_tools/ndk/platforms/android-16/arch-arm/include -internal-externc-isystem ../../third_party/android_tools/ndk/platforms/android-16/arch-arm/usr/include -O2 -Wno-builtin-macro-redefined -Wall -Werror -Wextra -Wno-missing-field-initializers -Wno-unused-parameter -Wno-c++11-narrowing -Wno-covered-switch-default -Wno-unneeded-internal-declaration -Wno-inconsistent-missing-override -Wno-undefined-var-template -Wno-nonportable-include-path -Wno-address-of-packed-member -Wno-unused-lambda-capture -Wno-user-defined-warnings -Wno-enum-compare-switch -Wno-tautological-unsigned-zero-compare -Wheader-hygiene -Wstring-conversion -Wtautological-overlap-compare -Wsign-compare -Winconsistent-missing-override -std=gnu++14 -fdeprecated-macro -fdebug-compilation-dir /b/c/builder/ClangToTAndroid/src/out/Release -ferror-limit 19 -fmessage-length 0 -fvisibility hidden -fvisibility-inlines-hidden -femulated-tls -stack-protector 1 -stack-protector-buffer-size 4 -fno-rtti -fno-signed-char -fobjc-runtime=gcc -fdiagnostics-show-option -fcolor-diagnostics -vectorize-loops -vectorize-slp -o obj/v8/test/cctest/cctest/test-strings.o -x c++ ../../v8/test/cctest/test-strings.cc 
1.	<eof> parser at end of file
2.	Code generation
3.	Running pass 'Function Pass Manager' on module '../../v8/test/cctest/test-strings.cc'.
4.	Running pass 'ARM Instruction Selection' on function '@_ZN2v88internal24ConsStringGenerationDataC2Eb'
clang-6.0: error: unable to execute command: Aborted
clang-6.0: error: clang frontend command failed due to signal (use -v to see invocation)
clang version 6.0.0 (trunk 313013)
Target: arm--linux-android
Thread model: posix
InstalledDir: /b/c/builder/ClangToTAndroid/src/out/Release/../../third_party/llvm-build/Release+Asserts/bin
clang-6.0: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
clang-6.0: note: diagnostic msg: 
********************
PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang-6.0: note: diagnostic msg: /b/rr/tmpd5MHt2/t/test-strings-58084e.cpp
clang-6.0: note: diagnostic msg: /b/rr/tmpd5MHt2/t/test-strings-58084e.sh
clang-6.0: note: diagnostic msg: 
********************
 

Comment 1 by h...@chromium.org, Sep 12 2017

Sounds a lot like https://bugs.llvm.org/show_bug.cgi?id=34045

Comment 2 by h...@chromium.org, Sep 12 2017

Attaching the source and invocation.
test-strings-34122c.cpp
8.2 MB View Download
test-strings-34122c.sh
9.7 KB View Download

Comment 3 by h...@chromium.org, Sep 12 2017

Status: Fixed (was: Assigned)
Reverted in r313044.

Sign in to add a comment