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Issue metadata

Status: Fixed
Owner:
Closed: Sep 2017
Cc:
EstimatedDays: ----
NextAction: ----
OS: Linux
Pri: 2
Type: Bug

Blocking:
issue 760615



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gfx_unittests fail under msan with newer clang

Project Member Reported by h...@chromium.org, Sep 5 2017

Issue description

For example, from the roll attempt at https://chromium-review.googlesource.com/c/chromium/src/+/644095, https://build.chromium.org/p/tryserver.chromium.linux/builders/linux_chromium_msan_rel_ng/builds/793:

This repros for me locally with the targeted clang (r312326) as well as ToT, but the tests pass with the currently pinned clang.




 [ RUN      ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,477 22x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 7x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 0
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,507 20x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,507 5x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 2
../../ui/gfx/render_text_unittest.cc:4520: Failure
      Expected: expected_total_bounds
      Which is: 0,477 22x45
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 8x45
[  FAILED  ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz, where GetParam() = 0 (1161 ms)
[ RUN      ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,477 22x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 7x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 0
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,507 20x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,507 5x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 2
../../ui/gfx/render_text_unittest.cc:4520: Failure
      Expected: expected_total_bounds
      Which is: 0,477 22x45
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 8x45
[  FAILED  ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz, where GetParam() = 0 (874 ms)
[ RUN      ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,477 22x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 7x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 0
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,507 20x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,507 5x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 2
../../ui/gfx/render_text_unittest.cc:4520: Failure
      Expected: expected_total_bounds
      Which is: 0,477 22x45
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 8x45
[  FAILED  ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz, where GetParam() = 0 (879 ms)
[ RUN      ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,477 22x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 7x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 0
../../ui/gfx/render_text_unittest.cc:4515: Failure
      Expected: expected_line_bounds
      Which is: 0,507 20x15
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,507 5x15
Google Test trace:
../../ui/gfx/render_text_unittest.cc:4506: Testing bounds for line 2
../../ui/gfx/render_text_unittest.cc:4520: Failure
      Expected: expected_total_bounds
      Which is: 0,477 22x45
To be equal to: GetSelectionBoundsUnion()
      Which is: 0,477 8x45
[  FAILED  ] RenderTextHarfBuzzTest.GetSubstringBoundsMultiline/HarfBuzz, where GetParam() = 0 (867 ms)

 

Comment 1 by h...@chromium.org, Sep 5 2017

I've started bisecting.

Comment 2 by h...@chromium.org, Sep 5 2017

Blocking: 760615

Comment 3 by h...@chromium.org, Sep 5 2017

Bisection points to r311737.

Comment 4 by h...@chromium.org, Sep 6 2017

./ui/gfx/render_text_harfbuzz.cc is the file getting miscompiled

Comment 5 by h...@chromium.org, Sep 6 2017

Owner: h...@chromium.org
Status: Started (was: Available)
Adding [[clang::optnone]] to RenderTextHarfBuzz::GetSubstringBounds makes the tests pass, so that's probably the miscompiled function.

Comment 6 by h...@chromium.org, Sep 6 2017

Yes, applying the change in r311737 so that it only fires for RenderTextHarfBuzz::GetSubstringBounds makes the tests fail.

But the asm diff is large. I'm still trying to figure out what's happening here or how to reduce it.

Comment 7 by h...@chromium.org, Sep 6 2017

With this diff, which reverses the effect of Chandler's patch for a single node in that function, the test passes:


diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1897f6a0c9c..5505d547d3e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -16464,6 +16464,8 @@ static SDValue EmitKTEST(SDValue Op, SelectionDAG &DAG,
 /// equivalent.
 SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl,
                                     SelectionDAG &DAG) const {
+  bool Dump = false;
+
   if (Op.getValueType() == MVT::i1) {
     SDValue ExtOp = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i8, Op);
     return DAG.getNode(X86ISD::CMP, dl, MVT::i32, ExtOp,
@@ -16664,6 +16666,33 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl,
   case ISD::XOR:
     // Similar to ISD::ADD above, check if the uses will preclude useful
     // lowering of the target-specific node.
+
+    // XXX
+    if (DAG.getMachineFunction().getName() == "_ZN3gfx18RenderTextHarfBuzz18GetSubstringBoundsERKNS_5RangeE") {
+      bool SelectUse = false, CmpUse = false;
+      for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
+             UE = Op.getNode()->use_end(); UI != UE; ++UI) {
+        if (UI->getOpcode() == ISD::SELECT) SelectUse = true;
+        if (UI->getOpcode() == X86ISD::CMP) CmpUse = true;
+      }
+      if (SelectUse && CmpUse) {
+        llvm::errs() << "===================\n";
+        llvm::errs() << "This node has both a SELECT and CMP user:\n";
+        Op.getNode()->dumprFull(&DAG);
+        size_t i = 0;
+        for (SDNode::use_iterator UI = Op.getNode()->use_begin(), UE = Op.getNode()->use_end(); UI != UE; ++UI, ++i) {
+          llvm::errs() << "\nUser " << i << ":\n";
+          UI->dumprFull(&DAG);
+        }
+#if 0
+        Dump = true;
+#else
+        goto regular_eflags;
+#endif
+      }
+    }
+    // XXX
+
     for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
            UE = Op.getNode()->use_end(); UI != UE; ++UI)
       if (UI->getOpcode() != ISD::CopyToReg &&
@@ -16671,6 +16700,7 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl,
           UI->getOpcode() != ISD::STORE)
         goto default_case;
 
+regular_eflags:
     // Otherwise use a regular EFLAGS-setting instruction.
     switch (ArithOp.getOpcode()) {
     default: llvm_unreachable("unexpected operator!");
@@ -16737,8 +16767,13 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl,
       return Node;
 
     // Emit a CMP with 0, which is the TEST pattern.
-    return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
+    auto N = DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
                        DAG.getConstant(0, dl, Op.getValueType()));
+    if (Dump) {
+      llvm::errs() << "Lowered:\n";
+      N.getNode()->dumpr(&DAG);
+    }
+    return N;
   }
   SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32);
   SmallVector<SDValue, 4> Ops(Op->op_begin(), Op->op_begin() + NumOperands);




My build command:

$ ninja -C /work/llvm.combined/build.release clang && touch ui/gfx/render_text_harfbuzz.cc && ninja -C out/release gfx_unittests && out/release/gfx_unittests --gtest_filter=RenderTextHarfBuzzTest*




If instead we dump the lowered node resulting from "goto default_case", we get:


===================
This node has both a SELECT and CMP user:
t193: i8 = and t192, t191
  t192: i8 = setcc t15, Constant:i8<0>, setne:ch
    t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
      t12: i64 = xor t9, t11
        t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
          t8: i64 = Register %vreg129
        t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
          t10: i64 = Register %vreg0
      t6: i64 = undef
    t23: i8 = Constant<0>
  t191: i8 = setcc t22, Constant:i8<0>, seteq:ch
    t22: i8 = and t7, t21
      t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
        t4: i64 = add t2, Constant:i64<16>
          t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
            t1: i64 = Register %vreg127
          t3: i64 = Constant<16>
        t6: i64 = undef
      t21: i8 = xor t15, Constant:i8<-1>
        t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
          t12: i64 = xor t9, t11
            t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
              t8: i64 = Register %vreg129
            t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
              t10: i64 = Register %vreg0
          t6: i64 = undef
        t20: i8 = Constant<-1>
    t23: i8 = Constant<0>
User 0:
t224: i32 = X86ISD::CMP t193, Constant:i8<0>
  t193: i8 = and t192, t191
    t192: i8 = setcc t15, Constant:i8<0>, setne:ch
      t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
        t12: i64 = xor t9, t11
          t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
            t8: i64 = Register %vreg129
          t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
            t10: i64 = Register %vreg0
        t6: i64 = undef
      t23: i8 = Constant<0>
    t191: i8 = setcc t22, Constant:i8<0>, seteq:ch
      t22: i8 = and t7, t21
        t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
          t4: i64 = add t2, Constant:i64<16>
            t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
              t1: i64 = Register %vreg127
            t3: i64 = Constant<16>
          t6: i64 = undef
        t21: i8 = xor t15, Constant:i8<-1>
          t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
            t12: i64 = xor t9, t11
              t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
                t8: i64 = Register %vreg129
              t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
                t10: i64 = Register %vreg0
            t6: i64 = undef
          t20: i8 = Constant<-1>
      t23: i8 = Constant<0>
  t23: i8 = Constant<0>
User 1:
t46: i32 = select t193, t45, t39
  t193: i8 = and t192, t191
    t192: i8 = setcc t15, Constant:i8<0>, setne:ch
      t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
        t12: i64 = xor t9, t11
          t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
            t8: i64 = Register %vreg129
          t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
            t10: i64 = Register %vreg0
        t6: i64 = undef
      t23: i8 = Constant<0>
    t191: i8 = setcc t22, Constant:i8<0>, seteq:ch
      t22: i8 = and t7, t21
        t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
          t4: i64 = add t2, Constant:i64<16>
            t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
              t1: i64 = Register %vreg127
            t3: i64 = Constant<16>
          t6: i64 = undef
        t21: i8 = xor t15, Constant:i8<-1>
          t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
            t12: i64 = xor t9, t11
              t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
                t8: i64 = Register %vreg129
              t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
                t10: i64 = Register %vreg0
            t6: i64 = undef
          t20: i8 = Constant<-1>
      t23: i8 = Constant<0>
  t45: i32 = or t42, t44
    t42: i32 = xor t34, t41
      t34: i32 = add t31, Constant:i32<-1>
        t31: i32,ch = CopyFromReg t0, Register:i32 %vreg121
          t30: i32 = Register %vreg121
        t33: i32 = Constant<-1>
      t41: i32,ch = CopyFromReg t0, Register:i32 %vreg119
        t40: i32 = Register %vreg119
    t44: i32,ch = CopyFromReg t0, Register:i32 %vreg122
      t43: i32 = Register %vreg122
  t39: i32 = select t190, t36, t38
    t190: i8 = setcc t7, Constant:i8<0>, seteq:ch
      t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
        t4: i64 = add t2, Constant:i64<16>
          t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
            t1: i64 = Register %vreg127
          t3: i64 = Constant<16>
        t6: i64 = undef
      t23: i8 = Constant<0>
    t36: i32,ch = CopyFromReg t0, Register:i32 %vreg118
      t35: i32 = Register %vreg118
    t38: i32,ch = CopyFromReg t0, Register:i32 %vreg120
      t37: i32 = Register %vreg120
User 2:
t54: i32 = select t193, t45, t53
  t193: i8 = and t192, t191
    t192: i8 = setcc t15, Constant:i8<0>, setne:ch
      t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
        t12: i64 = xor t9, t11
          t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
            t8: i64 = Register %vreg129
          t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
            t10: i64 = Register %vreg0
        t6: i64 = undef
      t23: i8 = Constant<0>
    t191: i8 = setcc t22, Constant:i8<0>, seteq:ch
      t22: i8 = and t7, t21
        t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
          t4: i64 = add t2, Constant:i64<16>
            t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
              t1: i64 = Register %vreg127
            t3: i64 = Constant<16>
          t6: i64 = undef
        t21: i8 = xor t15, Constant:i8<-1>
          t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
            t12: i64 = xor t9, t11
              t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
                t8: i64 = Register %vreg129
              t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
                t10: i64 = Register %vreg0
            t6: i64 = undef
          t20: i8 = Constant<-1>
      t23: i8 = Constant<0>
  t45: i32 = or t42, t44
    t42: i32 = xor t34, t41
      t34: i32 = add t31, Constant:i32<-1>
        t31: i32,ch = CopyFromReg t0, Register:i32 %vreg121
          t30: i32 = Register %vreg121
        t33: i32 = Constant<-1>
      t41: i32,ch = CopyFromReg t0, Register:i32 %vreg119
        t40: i32 = Register %vreg119
    t44: i32,ch = CopyFromReg t0, Register:i32 %vreg122
      t43: i32 = Register %vreg122
  t53: i32 = select t190, t38, t36
    t190: i8 = setcc t7, Constant:i8<0>, seteq:ch
      t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
        t4: i64 = add t2, Constant:i64<16>
          t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127
            t1: i64 = Register %vreg127
          t3: i64 = Constant<16>
        t6: i64 = undef
      t23: i8 = Constant<0>
    t38: i32,ch = CopyFromReg t0, Register:i32 %vreg120
      t37: i32 = Register %vreg120
    t36: i32,ch = CopyFromReg t0, Register:i32 %vreg118
      t35: i32 = Register %vreg118
Lowered:
t224: i32 = X86ISD::CMP t193, Constant:i8<0>
  t193: i8 = and t192, t191
    t192: i8 = setcc t15, Constant:i8<0>, setne:ch
      t15: i8,ch = load<LD1[%403](align=8)> t0, t12, undef:i64
        t0: ch = EntryToken
        t12: i64 = xor t9, t11
          t9: i64,ch = CopyFromReg t0, Register:i64 %vreg129
          t11: i64,ch = CopyFromReg t0, Register:i64 %vreg0
    t191: i8 = setcc t22, Constant:i8<0>, seteq:ch
      t22: i8 = and t7, t21
        t7: i8,ch = load<LD1[%sunkaddr638](align=8)> t0, t4, undef:i64
          t4: i64 = add t2, Constant:i64<16>
            t2: i64,ch = CopyFromReg t0, Register:i64 %vreg127




And we will see the same node again a couple of times.

Note that there's weird stuff going on here:

t193 is the node we're lowering. Its used by t224, which is an X86ISD::CMP node.

At "default_case:" we will emit an X86ISD::CMP, in fact with exactly the same arguments as t224, and because of the folding we just return t224.

I don't understand how this is supposed to work.

Also I'm not sure what role the ISD::SELECT node plays here.

Comment 8 by h...@chromium.org, Sep 6 2017

Attaching the IR for render_text_harfbuzz.cc.
The sdag node shows up with
$ build.release/bin/llc -o /dev/null /tmp/a.ll
a.ll
3.9 MB Download

Comment 9 by h...@chromium.org, Sep 6 2017

Extracting just the interesting function:

$ build.release/bin/llvm-extract -S -func _ZN3gfx18RenderTextHarfBuzz18GetSubstringBoun.llRKNS_5RangeE /tmp/a.ll > /tmp/b.ll
b.ll
128 KB Download

Comment 11 by h...@chromium.org, Sep 7 2017

Attaching the output of
build.release/bin/llc /tmp/b.ll -filetype=asm
with and without bailing out for that node.
good.s
117 KB Download
bad.s
116 KB Download

Comment 12 by h...@chromium.org, Sep 7 2017

Trying to mark some of the called functions noinline.

For my notes: command for getting the IR:

/work/llvm.combined/build.release/bin/clang++ -MMD -MF obj/ui/gfx/gfx/render_text_harfbuzz.o.d -DGFX_IMPLEMENTATION -DV8_DEPRECATION_WARNINGS -DUSE_UDEV -DUSE_AURA=1 -DUSE_PANGO=1 -DUSE_CAIRO=1 -DUSE_GLIB=1 -DUSE_NSS_CERTS=1 -DUSE_X11=1 -DNO_TCMALLOC -DMEMORY_TOOL_REPLACES_ALLOCATOR -DMEMORY_SANITIZER_INITIAL_SIZE -DMEMORY_SANITIZER -DFULL_SAFE_BROWSING -DSAFE_BROWSING_CSD -DSAFE_BROWSING_DB_LOCAL -DCHROMIUM_BUILD -DFIELDTRIAL_TESTING_ENABLED -DCR_CLANG_REVISION=\"307486\" -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -DNDEBUG -DNVALGRIND -DDYNAMIC_ANNOTATIONS_ENABLED=0 -DGLIB_VERSION_MAX_ALLOWED=GLIB_VERSION_2_32 -DGLIB_VERSION_MIN_REQUIRED=GLIB_VERSION_2_26 -DSK_IGNORE_LINEONLY_AA_CONVEX_PATH_OPTS -DSK_HAS_PNG_LIBRARY -DSK_HAS_WEBP_LIBRARY -DSK_HAS_JPEG_LIBRARY -DSK_SUPPORT_GPU=1 -DU_USING_ICU_NAMESPACE=0 -DU_ENABLE_DYLOAD=0 -DU_STATIC_IMPLEMENTATION -DICU_UTIL_DATA_IMPL=ICU_UTIL_DATA_FILE -DUCHAR_TYPE=uint16_t -I../.. -Igen -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/pango-1.0 -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/cairo -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/glib-2.0 -I../../build/linux/debian_jessie_amd64-sysroot/usr/lib/x86_64-linux-gnu/glib-2.0/include -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/pixman-1 -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/libpng12 -I../../build/linux/debian_jessie_amd64-sysroot/usr/include/glib-2.0 -I../../build/linux/debian_jessie_amd64-sysroot/usr/lib/x86_64-linux-gnu/glib-2.0/include -I../../third_party/libwebp/src -I../../skia/config -I../../skia/ext -I../../third_party/skia/include/c -I../../third_party/skia/include/config -I../../third_party/skia/include/core -I../../third_party/skia/include/effects -I../../third_party/skia/include/encode -I../../third_party/skia/include/gpu -I../../third_party/skia/include/images -I../../third_party/skia/include/lazy -I../../third_party/skia/include/pathops -I../../third_party/skia/include/pdf -I../../third_party/skia/include/pipe -I../../third_party/skia/include/ports -I../../third_party/skia/include/utils -I../../third_party/skia/third_party/vulkan -I../../third_party/skia/include/codec -I../../third_party/skia/src/gpu -I../../third_party/skia/src/sksl -I../../third_party/icu/source/common -I../../third_party/icu/source/i18n -I../../third_party/ced/src -I../../third_party/zlib -I../../third_party/harfbuzz-ng/src -I../../third_party/freetype/include -I../../third_party/freetype/src/include -fno-strict-aliasing --param=ssp-buffer-size=4 -fstack-protector -Wno-builtin-macro-redefined -D__DATE__= -D__TIME__= -D__TIMESTAMP__= -funwind-tables -fPIC -pipe -B../../third_party/binutils/Linux_x64/Release/bin -pthread -fcolor-diagnostics -fdebug-prefix-map=/usr/local/google/work/chromium/src=. -m64 -march=x86-64 -Wall -Werror -Wextra -Wno-missing-field-initializers -Wno-unused-parameter -Wno-c++11-narrowing -Wno-covered-switch-default -Wno-unneeded-internal-declaration -Wno-inconsistent-missing-override -Wno-undefined-var-template -Wno-nonportable-include-path -Wno-address-of-packed-member -Wno-unused-lambda-capture -Wno-user-defined-warnings -Wno-enum-compare-switch -O2 -fno-ident -fdata-sections -ffunction-sections -fno-omit-frame-pointer -g1 -gline-tables-only -gcolumn-info -fno-omit-frame-pointer -fsanitize=memory -fsanitize-memory-track-origins=2 -fsanitize-blacklist=../../tools/msan/blacklist.txt -fvisibility=hidden -Wheader-hygiene -Wstring-conversion -Wtautological-overlap-compare -std=gnu++14 -fno-rtti -nostdinc++ -isystem../../buildtools/third_party/libc++/trunk/include -isystem../../buildtools/third_party/libc++abi/trunk/include --sysroot=../../build/linux/debian_jessie_amd64-sysroot -fno-exceptions -fvisibility-inlines-hidden -c ../../ui/gfx/render_text_harfbuzz.cc -S -emit-llvm -o /tmp/a.ll

$ /work/llvm.combined/build.release/bin/llvm-extract -S -func _ZN3gfx18RenderTextHarfBuzz18GetSubstringBoundsERKNS_5RangeE /tmp/a.ll > /tmp/b.ll
b.ll
126 KB Download

Comment 13 by h...@chromium.org, Sep 7 2017

Looking at the machine-IR might be easier perhaps..
good.txt
242 KB View Download
bad.txt
242 KB View Download

Comment 14 by h...@chromium.org, Sep 7 2017

I'm starting to think this might take a while to get to the bottom of. Maybe we should land a work-around to unblock the roll in the meantime?

Comment 15 by h...@chromium.org, Sep 7 2017

Status: Fixed (was: Started)
r312620 seems to have fixed it.

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