binutils 2.27 assembler generates incorrect transformation from ldr to movs |
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Issue descriptionThe attached file clone.S from glibc-2.23/sysdeps/unix/sysv/linux/arm/clone.S is incorrectly handled in assembler from binutils 2.27. In the good version: 3e: f41c 7f80 tst.w ip, #256 ; 0x100 42: 4f08 ldr r7, [pc, #32] ; (64 <__clone+0x64>) 44: bf14 ite ne 46: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff Note that ite/movnew instructions depend on condition codes generated by tst.w. bad version, ldr is replaced by movs: 3e: f41c 7f80 tst.w ip, #256 ; 0x100 42: 2714 movs r7, #20 44: bf14 ite ne 46: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff According to ARM assembly docs for MOV: If S is specified, the instruction: Updates the N and Z flags according to the result. Can update the C flag during the calculation of Operand2. Does not affect the V flag. So movs changes the condition flags generated by tst.w. This is blocking binutils-2.27 upgrade.
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Jun 13 2017
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Jun 13 2017
Attaching clone.asm file used as input to assembler.
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Jun 13 2017
Opened upstream bug https://sourceware.org/bugzilla/show_bug.cgi?id=21590
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Jun 14 2017
Fixed in upstream https://sourceware.org/ml/binutils/2017-04/msg00179.html Created Cherry-pick to 2_27 branch at https://android-review.googlesource.com/#/c/415207/
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Jun 15 2017
Change committed. Verified that building a image with the change included fixes arm boards boot issue. |
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Comment 1 by manojgupta@chromium.org
, Jun 13 2017