gwendal@ recently made a change to flashrom which increased the max read and write size by interrogating the EC. Before, flashrom chose the minimum, but not no longer does.
This however uncovered a bug in the npcx SHI driver. (see issue 725580) In my quick analysis, it seems that the EC reports that it supports a bigger response than it actually does. In chip/npcx/shi.c, we say that the max response is 160 + host response, but when queried via protocol info we say that it's 163 + host response. (a diff of 3 B which appears to be SHI_PROTO3_OVERHEAD)
I suspect max_response_size should be SHI_MAX_RESPONSE - SHI_PROTO3_OVERHEAD, instead of just SHI_MAX_RESPONSE.
I'm sheriff this week so I haven't had a chance to test this out and look super close at it, but I can get to it next week unless someone else wants to.
Comment 1 by aaboagye@chromium.org
, May 25 2017