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Issue metadata

Status: Archived
Owner: ----
Closed: Jan 10
Cc:
EstimatedDays: ----
NextAction: ----
OS: ----
Pri: 3
Type: Bug



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ec: spi: Allow flexible CS pin configuration

Project Member Reported by sha...@chromium.org, Sep 1 2016

Issue description

In some chip SPI drivers, we're re-setting the state of our CS GPIO from spi_enable(), eg: 

enable:
                for (i = 0; i < spi_devices_used; i++) {
                        if (spi_devices[i].port != port)
                                continue;
                        gpio = spi_devices[i].gpio_cs;
                        /* Make sure CS# is a GPIO output mode. */
                        gpio_set_flags(gpio, GPIO_OUTPUT);
                        /* Make sure CS# is deselected */
                        gpio_set_level(gpio, 1);
                }

disable:
                for (i = 0; i < spi_devices_used; i++) {
                        if (spi_devices[i].port != port)
                                continue;
                        gpio = spi_devices[i].gpio_cs;
                        /* Make sure CS# is deselected */
                        gpio_set_level(gpio, 1);
                        gpio_set_flags(gpio, GPIO_ODR_HIGH);
                }

If we have an external PU, for example, we will want to configure the pin as OD when enabled.

Maybe we should rely on board-level code to correctly configure the pin in various modes.
 
Status: Archived (was: Untriaged)
Archiving P3s older than 1 year with no owner or component.

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