ec: Remove NOR flash write protect ranges that we don't care about
Reported by
dhend...@chromium.org,
Aug 2 2016
|
||
Issue descriptionThe purpose of this bug is to clarify the definition of the write-protection tables currently in ec/common/spi_flash_reg.c. As the comment in spi_flash_reg suggests, it's really not necessary to define all ranges in the datasheet since we basically only care about protecting a few ranges: none, half, or maybe a quarter in some cases. And, since CrOS ECs all boot from the lower portion of the address space (someone plz yell if I'm wrong) we only care about protecting the lower fractions of the address space. There might be multiple ranges with the same result, particularly if a CMP bit is present. Since the range might be set by some other program (OEM software or flashrom) it's still necessary to cover all permutations of the ranges that we care about.
,
Feb 3 2017
|
||
►
Sign in to add a comment |
||
Comment 1 by bugdroid1@chromium.org
, Aug 3 2016